DS2770 查看數據表（PDF） - Maxim Integrated
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DS2770 Datasheet PDF : 27 Pages
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FUNCTION COMMANDS Table 3
COMMAND
COMMAND
DESCRIPTION PROTOCOL
Read Data
Write Data
Reads data from
memory map starting
at address XX
Writes data to memory
starting at address XX
69h, XX
6Ch, XX
BUS STATE AFTER
COMMAND
PROTOCOL
Master RX
Master Tx
DS2770
BUS DATA
Unlimited
Unlimited
Copy Data
Recall Data
Lock
Refresh
Start Charge
Stop Charge
Copies shadow RAM
data to EEPROM
block that begins with
address location XX
Recalls EEPROM
block that begins with
address location XX to
shadow RAM
Permanently locks the
block of lockable
EEPROM memory
that begins with
address location XX
Restores Status
Register initialization
data
Initiates charge
through the host
interface.
Terminates charge
through the host
interface.
48h, XX
B8h, XX
6Ah, XX
63h
B5h
BEh
Master Reset
Master Reset
Master Reset
Master Reset
Master Reset
Master Reset
None
None
None
None
None
None
I/O SIGNALING
The 1-Wire bus requires strict signaling protocols to insure data integrity. The DS2770 uses the following
four protocols: the initiation sequence (reset pulse followed by presence pulse), Write 0, Write 1, and
Read Data. All of these types of signaling except the presence pulse are initiated by the bus master.
Figure 18 shows the initialization sequence required to begin any communication with the DS2770. A
presence pulse following a reset pulse indicates the DS2770 is ready to accept a Net Address command.
The bus master transmits (TX) a reset pulse for tRSTL. The bus master then releases the line and goes into
Receive Mode (RX). The 1-Wire bus line is then pulled high by the pull-up resistor. After detecting the
rising edge on the DQ pin, the DS2770 waits for the tPDH and then transmits the presence pulse for tPDL.
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