82C836A-16 查看數據表（PDF） - Unspecified

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82C836A-16

Single-Chip 386sx AT

Unspecified 

82C836 CHIPSet Introduction

Architectural Overview s

The major signal groups in a SCATsx AT-compatible architecture are as follows:

• AT bus interface signals, 8-bit section

° XD7:0, SDIRL (SD0-7)

° A19:0, MODA0 (SA0-19)

° HLDA (AEN), -REFRESH

° ALE

° -LOMEGCS (-SMEMR, -SMEMW)

° -XIOR, -XIOW

° IOCHRDY, -0WS

° -IOCHCK, IRQ3-7, IRQ9

° DREQ1-3, -DACK[1-3], TC

° XRST (RESETDRV), BUSCLK, OSC2

• AT bus interface signals, 16-bit extension

° XD15:8, SDIRH (SD8:15)

° A23:17, MODA20, -BHE, -MEMCS16, -IOCS16

° -MASTER

° -XMEMR, -XMEMW

° IRQ10-12, IRQ14:15

° DREQ0, DREQ5-7, -DACK[0, 5-7]

• Other 82C836 signals

° D0-15

° -ADS, -READY, M/-IO, D/-C, W/-R, -NA

° HOLD, INTR, NMI, PWRGOOD, CPURST

° CXIN, PROCCLK, OSC1

° MA0-9, RAS0-3, -CASL, -CASH, -MWE, PARL, PARH

° -ROMCS, 8042CS, -RESET2, 32KHz/IRQ8, PS/-RTCCS, SPKOUT

° -NPBUSY, -NPERR, -BUSY

Note: Signals listed above are 82C836 signals. Certain closely related AT bus equivalent

signals are shown in parentheses in cases where the correlation between 82C836 and

AT bus signals may not be readily apparent.

Chips and Technologies, Inc.

PRELIMINARY

Revision 3.0 1 -5

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