74VHCT14 查看數據表（PDF） - Nexperia B.V. All rights reserved

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74VHCT14

Hex inverting Schmitt trigger

Nexperia B.V. All rights reserved 

74VHC14; 74VHCT14

Hex inverting Schmitt trigger

Rev. 01 — 17 August 2009

Product data sheet

1. General description

The 74VHC14; 74VHCT14 are a high-speed Si-gate CMOS devices and are pin

compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with

JEDEC standard No. 7A.

The 74VHC14; 74VHCT14 provide six inverting buffers with Schmitt-trigger action. They

are capable of transforming slowly changing input signals into sharply defined, jitter-free

output signals.

2. Features

I Balanced propagation delays

I All inputs have Schmitt-trigger action

I Inputs accept voltages higher than VCC

I Input levels:

N The 74VHC14 operates with CMOS input level

N The 74VHCT14 operates with TTL input level

I ESD protection:

N HBM EIA/JESD22-A114E exceeds 2000 V

N MM EIA/JESD22-A115-A exceeds 200 V

N CDM EIA/JESD22-C101C exceeds 1000 V

I Multiple package options

I Specified from −40 °C to +85 °C and from −40 °C to +125 °C

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