AS8S512K32PECA12/IT 查看數據表（PDF） - Micross Components
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AS8S512K32PECA12/IT
Micross Components
AS8S512K32PECA12/IT Datasheet PDF : 8 Pages
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iPEM
16 MB ASYNC SRAM
AS8S512K32PECA
AC CHARACTERISTICS READ CYCLE
Parameter
Symbol
JEDEC Alt.
Write Cycle Time
tAVAV
tWC
Chip Enable to End of Write
tELWH
tCW
tELEH
tCW
Address Setup Time
tAVWL
tAS
tAVEL
tAS
Address Valid to End of Write
tAVWH
tAW
tAVEH
tAW
Write Pulse Width
tWLWH
tWP
tELEH
tWP
Write Recovery Time
tWHAZ
tWR
tEHAZ
tWR
Data Hold Time
tWHDX
tDH
tEHDZ
tDH
Write to Output in High Z
tWLQZ
tWHZ
Data to Write Time
tDVWH
tDW
tDVEH
tDW
Output Active from End of Write
tWHQX
tWLZ
12ns
Min Max
12
8
8
0
0
8
8
8
10
0
0
0
0
0
6
6
6
3
15ns
Min Max
15
10
10
0
0
10
10
10
12
0
0
0
0
0
7
7
7
3
20ns
Min Max
20
11
11
0
0
11
11
11
13
0
0
0
0
0
8
8
8
3
25ns
Min Max
25
12
12
0
0
12
12
12
14
0
0
0
0
0
9
9
9
3
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WRITE CYCLE 1 - W\ CONTROLLED
tAVAV
A
E\
tELWH
tAVWH
tWLWH
W\
tAVWL
D
tWLQZ
Q
tWHAX
tDVWH
tWHDX
DATA VALID
tWHQX
HIGH Z
AS8S512K32PECA
Rev. 0.3 03/11
Micross Components reserves the right to change products or specifications without notice.
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