ISL8484 查看數據表（PDF） - Renesas Electronics
零件编号
产品描述 (功能)
比赛名单
ISL8484
Renesas Electronics
ISL8484 Datasheet PDF : 13 Pages
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ISL8484
Test Circuits and Waveforms
V+
LOGIC
INPUT
0V
50%
tr < 5ns
tf < 5ns
tOFF
SWITCH
INPUT
VNO
SWITCH
OUTPUT 0V
VOUT
90%
tON
90%
Logic input waveform is inverted for switches that have the opposite
logic sense.
V+
C
SWITCH
INPUT
LOGIC
INPUT
NO OR NC
IN
GND
COM
VOUT
RL
CL
50
35pF
Repeat test for all switches. CL includes fixture and stray
capacitance.
VOUT = V(NO or NC) -r--L----+----r-r-L---O-----N----
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
V+
C
SWITCH
OUTPUT
VOUT
LOGIC ON
INPUT
VOUT
OFF
V+
ON
0V
RG
NO OR NC
COM
VG
GND
IN
LOGIC
INPUT
Q = VOUT x CL
FIGURE 2A. MEASUREMENT POINTS
Repeat test for all switches.
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
VOUT
CL
V+
C
V+
LOGIC
INPUT
0V
VNX
NO
NC
IN
COM
VOUT
RL
CL
50
35pF
SWITCH
OUTPUT
VOUT 0V
90%
tD
FIGURE 3A. MEASUREMENT POINTS
LOGIC
INPUT
GND
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
FN6128 Rev 5.00
May 12, 2008
Page 6 of 13
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