ISL9001A 查看數據表（PDF） - Renesas Electronics
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ISL9001A Datasheet PDF : 12 Pages
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ISL9001A
Pin Description
PIN
NUMBER
1
2
3
4
5
6
7
8
PIN NAME
VIN
EN
CBYP
CPOR
GND
NC
POR
VO
DESCRIPTION
Supply Voltage/LDO Input:
Connect a 1µF capacitor to GND.
LDO Enable.
Reference Bypass Capacitor Pin:
Optionally connect capacitor of value 0.01µF to 0.1µF between this pin and GND to achieve lowest noise and
highest PSRR.
POR Delay Setting Capacitor Pin:
Connect a capacitor between this pin and GND to delay the POR output release after the output reaches 94% of
its specified voltage level. (200ms delay per 0.01µF).
GND is the connection to system ground. Connect to PCB Ground plane.
Do not connect.
Open-drain POR Output (active-low):
Internally connected to VO through 100k resistor.
LDO Output:
Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
Typical Application
VIN (2.3V TO 5V) ON
ENABLE
OFF
C1
C2
C4
ISL9001A
1
VIN
8
VO
2
EN
POR 7
3
CBYP
4
CPOR
5
GND
VOUT OK
VOUT TOO LOW
VOUT
(200ms DELAY,
C4 = 0.01µF)
C3
C1, C3: 1µF X5R CERAMIC CAPACITOR
C2: 0.1µF X7R CERAMIC CAPACITOR
C4: 0.01µF X7R CERAMIC CAPACITOR
FN6433 Rev 3.00
December 10, 2015
Page 8 of 12
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