ISL97678IRZ-T 查看數據表（PDF） - Renesas Electronics

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ISL97678IRZ-T

8-Channel 45V, 50mA LED Driver

Renesas Electronics 

ISL97678

PWM Off time. Parallel capacitors should be placed across the

OVP resistors such that RUPPER/RLOWER = CLOWER/CUPPER.

Using a CUPPER value of at least 30pF is recommended. These

capacitors reduce the AC impedance of the OVP node, which is

important when using high value resistors.

Undervoltage Lockout

If the input voltage falls below the UVLO level of 2.8V, the device

will stop switching and be reset. Operation will restart only if the

device control interface re-enables it once the input voltage is

back in the normal operating range. Also all digital settings will

be reset to their default states.

Over-Temperature Protection (OTP)

The ISL97678 includes two over-temperature thresholds. The lower

threshold is set to +130°C. When this threshold is reached, any

channel which is outputting current at a level significantly below the

VIN

FAULT

DRIVER

IMAX ILIMIT

LOGIC

O/P

SHORT

FET

DRIVER

regulation target will be treated as “open circuit” and disabled after

a time-out period. The intention of the lower threshold is to allow

bad channels to be isolated and disabled before they cause enough

power dissipation (as a result of other channels having large

voltages across them) to hit the upper temperature threshold.

The upper threshold is set to +150°C. Each time this is reached,

the boost will stop switching and the output current sources will

be switched off and stay off until the control driver is power off

and re-enables it. For the extensive fault protection conditions,

please refer to Figure 27 and Table 1 for details.

Shutdown

When the EN pin is low the entire chip is shut down to give close

to zero shutdown current. The digital interfaces will not be active

during this time.

LX

OVP

VOUT

VSC

CH1

VSET/2

REG

THRM

SHDN

REF

OTP

VSET

+

-

PWM1/OC1/SC1

T2

TEMP

SENSOR

T1

Q1 VSET +

-

PWM8/OC8/SC8

CONTROL

LOGIC

DC CURRENT

FIGURE 27. SIMPLIFIED FAULT PROTECTIONS

CH8

Q8

TABLE 1. PROTECTIONS TABLE

CASE FAILURE MODE

1 CH1 Short Circuit

2 CH1 Short Circuit

DETECTION MODE

FAILED CHANNEL ACTION

Upper Over-Temperature

Protection limit (OTP) not

triggered and VIIN0 <

VSC

CH1 ON and burns power

Upper OTP triggered but CH1 goes off

VIIN1 < VSC

GOOD CHANNELS ACTION

CH2 through CH8 Normal

VOUT REGULATED

BY

Highest VF of CH2

through CH8

Same as CH1

Highest VF of CH2

through CH8

FN6998 Rev.3.00

Sep 8, 2017

Page 13 of 17

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