V436616Y24VATG-75PC 查看數據表（PDF） - Mosel Vitelic, Corp

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V436616Y24VATG-75PC

3.3 VOLT 16M x 64 HIGH PERFORMANCE 133 MHZ SDRAM UNBUFFERED SODIMM

Mosel Vitelic, Corp 

MOSEL VITELIC

SPD-Table for 75 modules: (Continued)

Byte Number Function Described

31

Module Bank Density (Per Bank)

32

SDRAM Input Setup Time

33

SDRAM Input Hold Time

34

SDRAM Data Input Setup Time

35

SDRAM Data Input Hold Time

62-61

Superset Information (May be used in Future)

62

SPD Revision

63

Checksum for Bytes 0 - 62

64

Manufacturer’s JEDEC ID Code

65-71

Manufacturer’s JEDEC ID Code (cont.)

72

Manufacturing Location

73-90

Module Part Number (ASCII)

91-92

PCB Identification Code

93

Assembly Manufacturing Date (Year)

94

Assembly Manufacturing Date (Week)

95-98

Assembly Serial Number

99-125

Reserved

126

Intel Specification for Frequency

127

Supported frequency

128+

Unused Storage Location

DC Characteristics

TA = 0°C to 70°C; VSS = 0 V; VDD, VDDQ = 3.3V ± 0.3V

Symbol Parameter

VIH

Input High Voltage

VIL

Input Low Voltage

VOH

Output High Voltage (IOUT = –4.0 mA)

VOL

Output Low Voltage (IOUT = 4.0 mA)

II(L)

Input Leakage Current, any input

(0 V < VIN < 3.6 V, all other inputs = 0V)

IO(L)

Output leakage current

(DQ is disabled, 0V < VOUT < VCC)

V436616Y24VATG-75PC

SPD Entry Value

128 Mbyte

1.5 ns

0.8 ns

1.5 ns

0.8 ns

Revision 2

Mosel Vitelic

1 = US, 2 = Taiwan

V436616Y24VATG-75PC

Current PCB Revision

Binary Coded year (BCD)

Binary Coded week (BCD)

byte 95 = LSB, byte 98 = MSB

Hex Value

16Mx64

20

15

08

15

08

00

02

E4

40

00

00

64

CF

00

Limit Values

Min.

Max.

2.0

–0.5

VCC+0.3

0.8

2.4

—

—

0.4

–40

40

–40

40

Unit

V

V

V

V

µA

µA

V436616Y24VATG-75PC Rev. 1.0 October 2001

5

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