CY2280 查看數據表（PDF） - SpectraLinear Inc
零件编号
产品描述 (功能)
比赛名单
CY2280
SpectraLinear Inc
CY2280 Datasheet PDF : 11 Pages
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CY2280
Function Table (-11S Option)
SEL100 SEL1 SEL0 SEL_SS[2]
0
0
0
N/A
0
0
1
N/A
0
1
0
N/A
0
1
1
0 (downspread)
0
1
1
1 (no spread)
1
0
0
N/A
1
0
1
N/A
1
1
0
N/A
1
1
1
0 (downspread)
1
1
1
1 (no spread)
CPU/PCI
PCICLK_F
Ratio CPUCLK PCICLK
2
Hi-Z
Hi-Z
2
Reserved Reserved
2
Reserved Reserved
2
66.66 MHz 33.33 MHz
2
66.66 MHz 33.33 MHz
3
TCLK/2 TCLK/6
3
Reserved Reserved
3
Reserved Reserved
3
100 MHz 33.33 MHz
3
100 MHz 33.33 MHz
REF
Hi-Z
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
TCLK[3]
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
APIC
Hi-Z
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
TCLK[3]
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
USBCLK
Hi-Z
48 MHz
48 MHz
48 MHz
48 MHz
TCLK/2
48 MHz
48 MHz
48 MHz
48 MHz
Function Table (-21S Option)
SEL100 SEL1 SEL0 SEL_SS[2]
0
0
0
N/A
0
0
1
N/A
0
1
0
N/A
0
1
1
0 (downspread)
0
1
1
1 (no spread)
1
0
0
N/A
1
0
1
N/A
1
1
0
N/A
1
1
1
0 (downspread)
1
1
1
1 (no spread)
CPU/PCI
PCICLK_F
Ratio CPUCLK PCICLK
2
Hi-Z
Hi-Z
2
Reserved Reserved
2
Reserved Reserved
2
66.66 MHz 33.33 MHz
2
66.66 MHz 33.33 MHz
3
TCLK/2 TCLK/6
3
Reserved Reserved
3
Reserved Reserved
3
100 MHz 33.33 MHz
3
100 MHz 33.33 MHz
REF
Hi-Z
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
TCLK[3]
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
APIC
Hi-Z
Reserved
Reserved
16.67 MHz
16.67 MHz
TCLK/12[3]
Reserved
Reserved
16.67 MHz
16.67 MHz
USBCLK
Hi-Z
48 MHz
48 MHz
48 MHz
48 MHz
TCLK/2
48 MHz
48 MHz
48 MHz
48 MHz
Actual Clock Frequency Values
Target Frequency Actual Frequency
Clock Output
(MHz)
(MHz)
PPM
CPUCLK
66.67
66.654
–195
CPUCLK
100
99.77
–2346
USBCLK
48.0
48.008
167
Power Management Logic
CPU_STOP PCI_STOP PWR_DWN
CPUCLK
PCICLK
X
X
0
Low
Low
0
0
1
Low
Low
0
1
1
Low
Running
1
0
1
Running
Low
1
1
1
Running
Running
Notes:
2. Target frequency is modulated by percentage shown (max.) when SEL_SS = 0.
3. TCLK supplied on the XTALIN pin in Test Mode.
Other
PCICLK_F Clocks
Low
Low
Running Running
Running Running
Running Running
Running Running
Osc. PLLs
Off
Off
Running Running
Running Running
Running Running
Running Running
Rev 1.0, November 25, 2006
Page 3 of 11
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