EV-ADF4196SD1Z 查看數據表（PDF） - Analog Devices
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EV-ADF4196SD1Z Datasheet PDF : 28 Pages
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ADF4196
1000
100
7nV/ Hz @ 20kHz
10
1
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 16. Voltage Noise Density Measured at the
Differential Amplifier Output
100
90
80
SW1,
SW2
+85°C
70
+25°C
60
–40°C
50
40
30
20
SW3
+85°C
+25°C
–40°C
TUNING VOLTAGE RANGE
10
0
0
1
2
3
4
5
DRAIN VOLTAGE (V)
Figure 17. On Resistance of the SW1, SW2, and SW3 Loop Filter Switches
Data Sheet
1.8
MEASURED USING AD8302 PHASE DETECTOR
Y-AXIS SCALE: 10mV/DEGREE
RF = 1880MHz, PFD = 26MHz, MOD = 130
1.5 X-AXIS SCALE: 2.77°/STEP
1.2
0.9
0.6
0.3
0
0 13 26 39 52 65 78 91 104 117 130
PHASE CODE
Figure 18. Detected RF Output Phase for Phase Code Sweep from 0 to MOD
104MHz
5dBm
ADF4193
EVAL BOARD
REFIN RFOUT
1805MHz
1880MHz
INPA
SIGNAL
GENERATOR
10MHz
EXT REF
VPHS
INPB
AD8302
EVB
1880MHz
OSCILLOSCOPE
SIGNAL
GENERATOR
INTERVAL BETWEEN R0 WRITES SHOULD BE A MULTIPLE OF MOD
REFERENCE CYCLES (5µs) FOR COHERENT PHASE MEASUREMENTS
Figure 19. Test Setup for Phase Lock Time Measurements
Rev. D | Page 10 of 28
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