CY23S08SXI-4T(2007) 查看數據表（PDF） - Cypress Semiconductor

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CY23S08SXI-4T
(Rev.:2007)

3.3V Zero Delay Buffer

Cypress Semiconductor 

Test Circuits

Figure 7. Test Circuit #1

0.1 μF

0.1 μF

VDD

OUTPUTS

V DD

GND

GND

CLK OUT

C LOAD

Test Circuit for all parameters except t8

0.1 μF

0.1 μF

Figure 8. Test Circuit #2

Test Circuit # 2

V DD

OUTPUTS

V DD

GND

GND

1 KΩ

CLK out

1 KΩ

10 pF

Test Circuit for t8, Output slew rate on –1H device

CY23S08

Document #: 38-07265 Rev. *G

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