UT62L25716BS-55LLE 查看數據表（PDF） - Utron Technology Inc
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UT62L25716BS-55LLE Datasheet PDF : 10 Pages
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Rev. 1.0
UTRON
UT62L25716
256K X 16 BIT LOW POWER CMOS SRAM
FEATURES
GENERAL DESCRIPTION
High speed access time :
55ns(max) for Vcc=3.0V~3.6V
70/100 ns(max) for Vcc=2.7V~3.6V
CMOS Low power consumption
Operation current : 45/35/25 (Icc,max.)
Standby: 20uA (TYP.) L-version
3uA (TYP.) LL-version
Single 2.7V~3.6V power supply
Operation temperature:
Commercial : 0℃~70℃
Extended : -20℃~80℃
All inputs and outputs are TTL compatible
Fully static operation
Three state outputs
Data retention voltage:1.5V (min.)
Data byte control : LB (I/O1~I/O8)
UB (I/O9~I/O16)
Package : 48-pin 6mm × 8mm TFBGA
FUNCTIONAL BLOCK DIAGRAM
A0
A1
A2
A3
.
A4
ROW
A8
. DECODER
A13
.
A14
A15
A16
A17
I/O...1
...
I/O
CONTROL
...
I/O16
MEMORY ARRAY
2048 Rows x 128 Columns x 16 bits
. ..
COLUMN I/O
CE1
CE2
WE
OE
LB
UB
LOGIC
CONTROL
COLUMN DECODER
A12 A11 A10 A9 A7 A6 A5
VCC
VSS
The UT62L25716 is a 4,194,304-bit low power
CMOS static random access memory organized as
262,144 words by 16 bits.
The UT62L25716 operates from a single 2.7V ~
3.6V power supply and all inputs and outputs are
fully TTL compatible.
The UT62L25716 is designed for low power system
applications. It is particularly well suited for use in
high-density low power system applications.
PIN DESCRIPTION
SYMBOL
A0 - A17
I/O1 - I/O16
CE1 , CE2
WE
OE
LB
UB
Vcc
Vss
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Lower-Byte Control
High-Byte Control
Power Supply
Ground
No Connection
PIN CONFIGURATION
A
LB OE A0 A1 A2 CE2
B
I/O9 UB A3 A4 CE 1 I/O1
C
I/O10 I/O11 A5 A6 I/O2 I/O3
D
Vss I/O12 A17 A7 I/O4 Vcc
E
Vcc I/O13 NC A16 I/O5 Vss
F
I/O15 I/O14 A14 A15 I/O6 I/O7
G
I/O16 NC A12 A13 WE I/O8
H
NC A8 A9 A10 A11 NC
1
2
3
4
5
6
TFBGA
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
P80047
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