0.0 0.2485
1.2
0.768
0.6135
0.459
1.1215
1.642
2.352
2.85
1.2
0.820
0.6655
0.511
0.0
0.0
0.921
2.119
0.0
2.85
Dimensions in MM
Figure 2. Chip Layout and Bond Pad Locations
(Chip Size is 2.85mm x 1.2mm. Back of chip is RF and DC Ground)
DRAIN SUPPLY
Vd = +4V
L
10,000pF
L
100pF
L
MMIC CHIP
RF IN
L
100pF
L
L
10,000pF
L
L
100pF
100pF
L
L
RF OUT
L
L
L
GROUND
(Back of Chip)
100pF
100pF
L
L
R = 3k Ohms
L = BOND WIRE INDUCTANCE
GATE SUPPLY
Vg
OUTPUT POWER
DETECTOR VOLTAGE
Vdet
Figure 3. Recommended Application Schematic Circuit Diagram
©2004 Fairchild Semiconductor Corporation
RMWD24001 Rev. D