STA020DJTR 查看數據表（PDF） - STMicroelectronics
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STA020DJTR Datasheet PDF : 15 Pages
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STA020
General description
Figure 7. Transparent mode interface
RXP
RXN
STA120
MCK
CBL
C
U
V
FSYNC
SCK
SDATA
V+
TRNPT
TXP
TXN
STA020
DATA
PROCESSING
D97AU605
Figure 8. Block diagram - professional mode
8
SDATA
6
SCK
7
FSYNC
M0 M1 M2
23 22 21
SERIAL
PORT
LOGIC
AUDIO
AUX
C Bits
10
C
11
U
9
V
REGISTERS
MUX
CRC
U Bits
VALIDITY
PREAMBLE
PARITY
2 14 13 3 4 1 12
PRO EM0 EM1 C1 C6 C7 C9
24
TRNPT
MUX
BIPHASE
MARK
ENCODER
20
LINE
DRIVER
17
TXP
TXN
TIMING
16
RST
15
5
CBL MCK
D97AU607B
DocID006832 Rev 7
11/15
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