TS83C51U2 查看數據表（PDF） - Atmel Corporation
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TS83C51U2 Datasheet PDF : 67 Pages
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TS80C51U2
TS83C51U2
TS87C51U2
Table 3. Pin Description for 40/44 pin packages
PIN NUMBER
MNEMONIC
TYPE
DIL LCC VQFP 1.4
NAME AND FUNCTION
Reset
9
10
4
I Reset: A high on this pin for two machine cycles while the oscillator is running,
resets the device. An internal diffused resistor to VSS permits a power-on reset
using only an external capacitor to VCC. If the hardware watchdog reaches its
time-out, the reset pin becomes an output during the time the internal reset is
activated.
ALE/PROG
30 33
27
O (I) Address Latch Enable/Program Pulse: Output pulse for latching the low byte
of the address during an access to external memory. In normal operation, ALE
is emitted at a constant rate of 1/6 (1/3 in X2 mode) the oscillator frequency,
and can be used for external timing or clocking. Note that one ALE pulse is
skipped during each access to external data memory. This pin is also the program
pulse input (PROG) during EPROM programming. ALE can be disabled by
setting SFR’s AUXR.0 bit. With this bit set, ALE will be inactive during internal
fetches.
PSEN
29 32
26
O Program Store ENable: The read strobe to external program memory. When
executing code from the external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access
to external data memory. PSEN is not activated during fetches from internal
program memory.
EA/VPP
31 35
29
I External Access Enable/Programming Supply Voltage: EA must be externally
held low to enable the device to fetch code from external program memory
locations 0000H and 3FFFH (RB) or 7FFFH (RC), or FFFFH (RD). If EA is
held high, the device executes from internal program memory unless the program
counter contains an address greater than 3FFFH (RB) or 7FFFH (RC) EA must
be held low for ROMless devices. This pin also receives the 12.75V programming
supply voltage (VPP) during EPROM programming. If security level 1 is
programmed, EA will be internally latched on Reset.
XTAL1
19 21
15
I Crystal 1: Input to the inverting oscillator amplifier and input to the internal
clock generator circuits.
XTAL2
18 20
14
O Crystal 2: Output from the inverting oscillator amplifier
RxD_1
-
12
6
I Serial Input for UART_1. For 44-pin package only.
TxD_1
-
34
28
O
Serial Ouput for UART_1. This pin is pulled up by a 100K resistor when not
selected. For 44-pin package only.
Rev. D - 15 January, 2001
7
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