P4C1981-25JC 查看數據表（PDF） - Semiconductor Corporation

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P4C1981-25JC

ULTRA HIGH SPEED 16K x 4 CMOS STATIC RAMS

Semiconductor Corporation 

READ CYCLE NO. 2 (ADDRESS Controlled)(5,6)

P4C1981/1981L, P4C1982/1982L

READ CYCLE NO. 3 (CE1, CE2 Controlled)(5,7,8)

Note:

11. Transitions caused by a chip enable control have similar delays irrespective of whether CE1 or CE2 causes them.

Document # SRAM114 REV B

Page 5 of 13

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