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LT8301MP 查看數據表(PDF) - Analog Devices

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LT8301MP Datasheet PDF : 24 Pages
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LT8301
APPLICATIONS INFORMATION
Tables 2 and 3 show some recommended diodes and
Zener diodes.
Table 2. Recommended Zener Diodes
PART
VZENER POWER
(V)
(W)
CASE
CMDZ5248B 18
0.25 SOD-323
CMDZ5250B 20
0.25 SOD-323
VENDOR
Central Semiconductor
Table 3. Recommended Diodes
PART
IMAX VREVERSE
(A) (V)
CASE
VENDOR
CMHD4448 0.25 100 SOD-123 Central Semiconductor
DFLS1100
1
100 PowerDI-123 Diodes Inc.
DFLS1150
1
150 PowerDI-123 Diodes Inc.
The recommended approach for designing an RC snub-
ber is to measure the period of the ringing on the SW
pin when the power switch turns off without the snub-
ber and then add capacitance (starting with 100pF) until
the period of the ringing is 1.5 to 2 times longer. The
change in period will determine the value of the parasitic
capacitance, from which the parasitic inductance can be
determined from the initial period, as well. Once the value
of the SW node capacitance and inductance is known, a
series resistor can be added to the snubber capacitance
to dissipate power and critically dampen the ringing. The
equation for deriving the optimal series resistance using
the observed periods ( tPERIOD and tPERIOD(SNUBBED)) and
snubber capacitance (CSNUBBER) is:
CPAR
=
⎝⎜
CSNUBBER
tPERIOD(SNUBBED)
tPERIOD
⎠⎟
2
1
L
PAR
=
tPERIOD2
CPAR • 4π2
RSNUBBER =
LPAR
CPAR
Note that energy absorbed by the RC snubber will be
converted to heat and will not be delivered to the load.
In high voltage or high current applications, the snubber
may need to be sized for thermal dissipation.
Undervoltage Lockout (UVLO)
A resistive divider from VIN to the EN/UVLO pin imple-
ments undervoltage lockout (UVLO). The EN/UVLO pin
falling threshold is set at 1.228V with 14mV hysteresis.
In addition, the EN/UVLO pin sinks 2.5µA when the volt-
age at the pin is below 1.228V. This current provides user
programmable hysteresis based on the value of R1. The
programmable UVLO thresholds are:
VIN(UVLO+)
=
1.242V •(R1+
R2
R2)
+
2.5µA
R1
VIN(UVLO)
=
1.228V •(R1+
R2
R2)
Figure 7 shows the implementation of external shutdown
control while still using the UVLO function. The NMOS
grounds the EN/UVLO pin when turned on, and puts the
LT8301 in shutdown with quiescent current less than 2µA.
VIN
R1
EN/UVLO
LT8301
R2
GND
8301 F07
RUN/STOP
CONTROL
(OPTIONAL)
Figure 7. Undervoltage Lockout (UVLO)
Rev. B
14
For more information www.analog.com

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