ADSP-2165KS-80 查看數據表（PDF） - Analog Devices
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ADSP-2165KS-80 Datasheet PDF : 39 Pages
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ADSP-216x
CLOCK OR
CRYSTAL
3
4
CLKIN XTAL CLKOUT VDD
RESET
IRQ2
GND
SERIAL
PORT 0
SCLK
RFS
TFS
DT
DR
SERIAL
DEVICE
(OPTIONAL)
BR
BG
MMAP
PMS
ADSP-216x
SCLK
RFS OR IRQ0
SERIAL TFS OR IRQ1
PORT 1 DT OR FO
RD RW ADDRESS DATA DMS BMS DR OR FI
SERIAL
DEVICE
(OPTIONAL)
14
24
D23-8
A D CS
OE
WE
PROGRAM
MEMORY
(OPTIONAL)
16
A
D CS
OE
WE
DATA
MEMORY
&
PERIPHERALS
Figure 3. Basic System Configuration
Program Memory Interface
The on-chip program memory address bus (PMA) and on-chip
program memory data bus (PMD) are multiplexed with the on-
chip data memory buses (DMA, DMD), creating a single exter-
nal data bus and a single external address bus. The external
data bus is bidirectional and is 24 bits wide to allow instruction
fetches from external program memory. Program memory may
contain code and data.
The external address bus is 14 bits wide. For the ADSP-216x,
these lines can directly address up to 16K words, of which 2K
are on-chip.
The data lines are bidirectional. The program memory select
(PMS) signal indicates accesses to program memory and can be
used as a chip select signal. The write (WR) signal indicates a
write operation and is used as a write strobe. The read (RD)
signal indicates a read operation and is used as a read strobe or
output enable signal.
The ADSP-216x processors write data from their 16-bit regis-
ters to 24-bit program memory using the PX register to provide
the lower eight bits. When the processor reads 16-bit data from
24-bit program memory to a 16-bit data register, the lower eight
bits are placed in the PX register.
The program memory interface can generate 0 to 7 wait states for
external memory devices; default is to 7 wait states after RESET.
Program Memory Maps
Program memory can be mapped in two ways, depending on the
state of the MMAP pin. Figure 4 shows the program memory
map for the ADSP-2165/ADSP-2166. Figures 5 and 6 show the
program memory maps for the ADSP-2161/ADSP-2162 and
ADSP-2163/ADSP-2164, respectively.
ADSP-2165/ADSP-2166
When MMAP = 0, on-chip program memory ROM occupies
12K words beginning at address 0x0000. Internal program
memory RAM occupies 1K words beginning at address 0x3000.
Off-chip program memory uses the 2K words beginning at
address 0x3800. The ADSP-2165/ADSP-2166 does not support
boot memory.
When MMAP = 1, 2K words of off-chip program memory begin
at address 0x0000. 10K words of on-chip program memory
ROM at 0x800 to 0x2FFF, and the remainder 2K words of
program memory ROM is at 0x3800 to 0x3FFF. Internal pro-
gram memory RAM occupies 1K words at address 0x300 to
0x33FF.
0x0000
12K ؋ 24
INTERNAL
ROM
1K ؋ 24 RAM
RESERVED
2K ؋ 24
EXTERNAL
MMAP = 0
0x2FFF
0x3000
0x33FF
0x3400
0x37FF
0x3800
0x3FFF
2K
EXTERNAL
10K ؋ 24
INTERNAL
ROM
1K ؋ 24 RAM
RESERVED
2K ؋ 24
INTERNAL
ROM
MMAP = 1
0x0000
0x07FF
0x0800
0x2FFF
0x3000
0x33FF
0x3400
0x37FF
0x3800
0x3FFF
Figure 4. ADSP-2165/ADSP-2166 Program Memory Maps
ADSP-2161/ADSP-2162
When MMAP = 0, on-chip program memory ROM occupies
8K words beginning at address 0x0000. Off-chip program
memory uses the remaining 8K words beginning at address
0x2000.
When MMAP = 1, 2K words of off-chip program memory begin
at address 0x0000. 6K words of on-chip program memory ROM
are at 0x0800 to 0x1FF0, and the remainder 2K words of pro-
gram memory ROM is at 0x3800 to 0x3FFF. An additional 6K
of off-chip program memory is at 0x2000 to 0x37FF.
0x0000
8K
INTERNAL
ROM
RESERVED
8K
EXTERNAL
0x1FF0
0x1FFF
0x2000
0x3FFF
MMAP = 0
2K
EXTERNAL
6K
INTERNAL
ROM
RESERVED
6K
EXTERNAL
2K
INTERNAL
ROM
MMAP = 1
0x0000
0x7FFF
0x0800
0x1FF0
0x1FFF
0x2000
0x37FF
0x3800
0x3FFF
Figure 5. ADSP-2161/ADSP-2162 Program Memory Maps
REV. 0
–7–
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