BR24G64NUX-5(2017) 查看數據表（PDF） - ROHM Semiconductor

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BR24G64NUX-5
(Rev.:2017)

Serial EEPROM Series Standard EEPROM I2C BUS EEPROM (2-Wire)

ROHM Semiconductor 

BR24G64xxx-5 Series

Caution on Power-Up Conditions

At power-up, as the VCC rises, the IC’s internal circuits may go through unstable low voltage area, making the IC’s internal

circuit not completely reset, hence, malfunction may occur. To prevent it, this IC is equipped with Power-on Reset (P.O.R.)

circuit and LVCC circuit. In order to ensure its operation, observe the following three conditions at power-up.

1. Set SDA = 'HIGH' and SCL ='LOW' or 'HIGH'.

2. In order to operate the P.O.R. function, please turn on the power supply so as to satisfy the power-up conditions below.

In order to start its normal operation, set the power supply rise so that the supply voltage constantly increases from

Vbot to VCC level. Also, do not input commands during tINIT from power supply stabilized.

tPOFF

tR:VCC tINIT

VCC

Command

start

VCC(Min)

Vbot

0V

Figure 56. Rise Waveform Diagram

Power-Up Conditions

Parameter

Symbol Min

Typ

Max

Unit

Supply Voltage at Power OFF

Vbot

-

-

0.3

V

Power OFF Time(Note 19)

tPOFF

1

-

Initialize Time(Note 19)

tINIT

0.1

-

Supply Voltage Rising Time(Note 19)

tR:VCC

0.001

-

(Note 19) Not 100% TESTED

-

ms

-

ms

100

ms

3. Set SDA and SCL so as not to be 'Hi-Z'.

When the above conditions 1 and 2 cannot be observed, please take the following measures.

Be sure to observe condition 3.

(1) When the above condition 1 cannot be observed and SDA becomes 'LOW' at power-up.

→Control SCL and SDA as shown below, and set both SCL and SDA to 'HIGH'.

VCC

SCL

tLOW

VCC

SCL

SDA

SDA

tINIT tHD:DAT tSU:DAT

Figure 57. When SCL='HIGH' and SDA='LOW'

tINIT tSU:DAT

Figure 58. When SCL='LOW' and SDA='LOW'

(2) In the case when the above condition 2 cannot be observed.

→Set WP = 'HIGH' at power-up and then execute reset.

(3) In the case when the above conditions 1 and 2 cannot be observed.

→Set WP = 'HIGH' at power-up, perform (1) and then (2).

Low Voltage Malfunction Prevention Function

LVCC circuit prevents data rewrite operation at low power, and prevents write error. At LVCC voltage (Typ =1.2V) or below,

data rewrite is prevented.

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TSZ22111 • 15 • 001

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TSZ02201-0GGG0G100910-1-2

30.Nov.2017 Rev.001

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