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CY2048WAF 查看數據表(PDF) - Cypress Semiconductor

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CY2048WAF Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
CY2048WAF
Absolute Maximum Conditions
(Above which the useful life may be impaired.
For user guidelines, not tested.)
Supply Voltage (VDD) ........................................–0.5 to +7.0V
DC Input Voltage...................................... –0.5V to VDD + 0.5
Crystal Specifications[1]
Output Short Circuit Current ..................................... ± 50 mA
Storage Temperature (Non-condensing) .... –55°C to +125°C
Junction Temperature ................................ –40°C to +125°C
Data Retention @ Tj = 125°C................................> 10 years
ESD (Human Body Model) MIL-STD-883................. > 2000V
Parameter
Description
FNOM
R1
R3/R1
Nominal crystal frequency
Equivalent series resistance (ESR)
Ratio of third overtone mode ESR to
fundamental mode ESR
C0
Crystal shunt capacitance
C1
Crystal motional capacitance
Comments
Fundamental mode, AT cut
Fundamental mode
Ratio used because typical R1 values are
much less than the maximum spec
Min.
10
4.5
Typ.
Max.
48
40
Unit
MHz
5 pF
2
fF
Operating Conditions
VDD
TJ
CXIN
CXOUT
CL
Parameter
COUT
tRAMP
TS
Description
Operating Voltage
Junction Temperature
Capacitance XIN, all tuning caps OFF
Capacitance XOUT, all tuning caps OFF
All tuning Caps OFF
All tuning Caps ON
Output Load Capacitance
Power-up time for VDD to reach minimum specified
voltage (power ramps must be monotonic)
Start up time, 90% VDD to valid frequency on output
Min.
2.7
–40
4
9.2
0.05
Typ.
10
10
5
10
Max. Unit
3.6
V
125 °C
pF
pF
6
pF
11.4 pF
15
pF
500 ms
10
ms
DC Electrical Specifications TJ = –40 to 125°C over the operating range
Parameter
VIL
VIH
VOL
VOH
IIL
IIH
IOZL
IOZH
IDD
IPD
RUP
Description
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Input Low Current
Input High Current
Output Leakage Current
Output Leakage Current
Power Supply Current
Power Down Current
Input Pull-up resistor
RDN
Output Pull-down resistor
CIN
Input Pin Capacitance
RF
Crystal Feedback R
Condition
CMOS Levels
CMOS Levels
VDD = 2.7V–3.6V, IOL = 8 mA
VDD = 2.7V–3.6V, IOL = –8 mA
Input = VSS
Input = VDD
Output = VSS
Output = VDD
No Load, VDD = 3.3V, 48 MHz
PD# = 0V
VIN = VSS
VIN> = 0.8VDD
VIN = 0.5VDD
PD#/OE pin
XIN = 0
Min.
80
VDD–0.4
1
80
500
300
Typ.
1
1
1
3
120
900
Max.
20
0.4
10
10
10
50
20
25
6
150
1500
7
800
Unit
%VDD
%VDD
V
V
µA
µA
µA
µA
mA
µA
M
k
k
pF
k
Note:
1. Not 100% tested.
Document #: 38-07738 Rev. *A
Page 3 of 7

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