MC14560B 查看數據表（PDF） - Motorola => Freescale
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MC14560B Datasheet PDF : 13 Pages
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TRUTH TABLE
Inputs
Outputs
AS BS′ Cout EAC SGN OVF
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
0
1
0
1
1
0
1
1
1
0
0
1
0
0
1
0
1
1
1
0
0
1
0
1
1
0
0
1
1
1
1
1
0
ę BS = (Add/Sub) BS
AS = Sign of A (“1” = Negative)
BS = Sign of B (“1” = Negative)
Cout = Adder Carry Out
KARNAUGH MAPS
End Around Carry
AS
Sign (SGN)
AS
Overflow (OVF)
AS
0
1
Cout 0
0*
1
1
1 BS′
0
1
Cout 0*
0
0
1
0
1 BS′
0
0
Cout 1
1
0
1
0 BS′
0
0
* = Center of Symmetry
EAC = S2 (ASBS′ Cout) + S3 (ASBS′ Cout)
= M3 (ASBS′ Cout)
SGN = S2 (ASBS′ Cout) + S3 (ASBS′ Cout)
= M3 (ASBS′ Cout)
EAC
ę
Cout
=
0
1
0
0
1
1
ę
1
1
=
0
1
1
1
0
0
0
0
OVF
0
1
0
0
1
0
0
0
Figure 10. Mapping of EAC, Sign and Overflow Logic
MOTOROLA CMOS LOGIC DATA
MC14560B
11
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