STLC1511 查看數據表（PDF） - STMicroelectronics
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STLC1511 Datasheet PDF : 31 Pages
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STLC1511
Table 3. Transmit Path Specifications
Unless otherwise noted, typical specifications apply for VCC=5 Volts, temperature=27×C, nominal process and
current. Maximum and minimum performance is with VCC ±5%, -40 =<Tjunction =< 105×C, and worst case process.
Description
min
typ
max
Units
Comments
Settling Time16
300
nsec Time for PGA to settle to
3t accuracy after a
change in the control
word indicated by ENB
going high.
<1>For the purposes of this specification, a gain of 1V/V (i.e. 0dB) is defined as the ratio of the full scale DAC input word to the output
voltage at TXOP/TXON when the output from the Tx path is at 2.4Vp differential measured between TXOP and TXON.
<2>For G.lite the STLC1511 will support both CO and CPE applications. As such it needs to support rates from 30kHz to 120kHz
(CPE Transmit band) and 155kHz to 540kHz (CO Transmit band). 275kHz is roughly in the middle of the required frequency range.
<3>Will be tested at Vcc=5.0V, 27oC, and f=275kHz.
<4>Will be tested at Vcc=5.0V and f=275kHz.
<5>Will be tested at 27oC and f=275kHz.
<6>Will be tested at Vcc=5.0V and 27oC.
<7>Two tone distortion is measured with two sinewaves with each sinewave at an amplitude of 1/2 full scale. Tone one is at
f1=400kHz and tone two is at f2=500kHz. The two tone distortion requirement is measured from the rms voltage of a single signal
tone to the peak rms voltage of the distortion products.
<8>A multi-tone sine wave is used for the DS Multi-tone test. (The multi-tone signal will be 89 sinewaves equally spaced from
36*4.3125kHz to 125*4.3125kHz with a peak-to-rms ratio of 5.3V/V and an rms voltage equal to 1/5.3 of the peak full scale range
of the PGA.) Multi-tone measures the difference between the rms voltage of a single tone at the output to the rms voltage of the
peak distortion product at the output in the band of interest.
<9>A multi-tone sine wave is used for the US Multi-tone test. (The multi-tone signal will be 21 sinewaves equally spaced from
7*4.3125kHz to 28*4.3125kHz with a peak-to-rms ratio of 5.3V/V and an rms voltage equal to 1/5.3 of the peak full scale range
of the PGA.) Multi-tone test measures the difference between the rms voltage of a single tone at the output to the rms voltage of
the peak distortion product at the output in the band of interest.
<10>Noise voltage is specified as the noise spectral density (en) at the output. Conversion to power spectral density is as follows:
PSD
=
10
×
log
1-e---0n---0-2-
×
1000
<11>The output referred noise voltage for the STLC1511 can be calculated as follows:
en =
·
(40nV
⁄
2
Hz)
+
( 10( G
+
5.3)
⁄
20
×
·
50 n V
⁄
H
z
2
)
where G is the gain of the TxPGA expressed in dB.
<12>The output referred noise of the Tx path at the 0dB gain setting is mainly due to the output referred noise of the DAC amplified
by 5.3dB to the output of the chip. The DAC noise itself is made up of roughly equal contributions between quantization noise and
thermal noise. It is only the thermal noise portion which will significantly change between a typical and worst case device.
<13>The SNDR is the ratio of PSD of the signal to the PSD of the noise plus distortion. The input for this test is as described in h
above scaled by the gain to produce a full scale output signal.
<14>The effective noise plus distortion floor can be calculated from the SNDR based on the PSD of the output signal
.
PSD
=
10
×
log
(---2---.--4-----⁄--(---5---.--3----×---------5----4--1-0--0--k--0-H-----z-----–----1---5----5----k---H-----z---)---)--2-
×
1000
=
–52.7dBm ⁄ Hz
So that for G=0, the effective noise plus distortion floor will be at -52.7dBm/Hz - 74dB = -126.7dBm/Hz and for G=max, the floor is
at -52.7dBm/Hz -32dB (cutback) - 53dB = -137.7dBm/Hz
<15>The SNDR is the ratio of PSD of the signal to the PSD of the noise plus distortion. The input for this test is as described in i above
scaled by the gain to produce a full scale output signal.
<16>1t settling time is roughly equivalent to the unity gain frequency of the PGA block.
11/31
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