MX98745
F. LED Display (Continued)
PAD #
88
72
89
Name
LED7/
PHY4
EECS
MON
I/O
I/O,
TTL
O,
CMOS
I/O,
TTL
Description
LED 7/Physical Address 4. Value on LED7 will be latched at the rising edge of
RESETL as the physical address 4 of MX98745. If EECONF is set, Physical
address will be overwritten by the value from EEPROM.
After EEPROM operation is completed, this pin will display port 7's Receivee/
Link, Partition, Isolation status and indicates 80+% Network utilization and 20+%
collision rate according to the value on LDS[2:0].
EEPROM Chip Select. Output by MX98745 when EECONF is set and EEPROM
operation is activated by MX98745.
Monitor. Value on this pin will be latched at the rising edge of RESETL. When
programmed to high, internal state machines's states will be outputed to this
pin serially for debugging usage. For normal operation, left unconnected.
G. Power/Ground Pins
PAD # Name I/O
1,14,
GND
17,55,
58,69,
77,81,
97,106,
121,127,
133,147,
160
23,29, VDD
41,73,
80,103,
112,120,
136,
Description
Ground.
5V Power Supply.
Table 5-1 Pin Description for XRC II (Continued)
P/N:PM0427
REV. 1.4, JUL. 8, 1998
10