¡ Semiconductor
FEDL6786-03
MSM6786
Switching Characteristics
Parameter
Clock Frequency
Clock Pulse Width
Rise/Fall Time
Data Setup Time
Data Hold Time
Load Pulse Width
ClockÆLoad Time
LoadÆClock Time
Output Delay Time 1
Output Delay Time 2
Symbol
fCP
tWCP
tr,tf
tDSU
tDHD
tWLD
tCL
tLC
tPD1
tPD2
Condition
—
—
—
—
—
—
—
—
CL=50pF
—
Min.
—
200
—
100
100
200
100
200
—
—
(VDD=5V±10%, Ta=–40 to +85°C)
Max.
Unit
2.0
MHz
—
ns
50
ns
—
ns
—
ns
—
ns
—
ns
—
ns
300
ns
300
ns
tWCP
tWCP
tr
CLOCK
0.8VDD
tf
0.2VDD
1/fCP
tDSU tDHD
DATA I/O
0.8VDD
0.2VDD
(During input mode)
0.8VDD
0.2VDD
tWLD
LOAD
tCL 0.8VDD tLC
0.2VDD
DATA I/O (When changing from input mode to output mode)
HiZ
tPD1
tPD1
0.8VDD
0.2VDD
tPD2
DATA I/O (When changing from output mode to input mode)
HiZ
(The charging and discharging time during high impedance depends on trace resistance and stray capacitance.)
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