PI6C185-02 查看數據表（PDF） - Pericom Semiconductor
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PI6C185-02 Datasheet PDF : 6 Pages
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PI6C185-02 111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222
Precision 1-7 Clock Buffer
Features
High speed, low noise non-inverting 1-7 buffer
Supports up to three SDRAM DIMMs
Low skew (<250ps) between any two output clocks
I2C Serial Configuration interface
Multiple VDD, VSS pins for noise reduction
3.3V power supply voltage
16-pin TSSOP (L) and QSOP (Q) packages
Description
The PI6C185-02 is a high-speed low-noise 1-7 non-inverting
buffer designed for SDRAM clock buffer applications.
This buffer is intended to be used with the PI6C10X clock
generator for Intel Architecture-based Mobile systems.
At power up all SDRAM output are enabled and active. The I2C
Serial control may be used to individually activate/deactivate any
of the 7 output drivers.
Note:
Purchase of I2C components from Pericom conveys a license to
use them in an I2C system as defined by Philips.
Block Diagram
BUF_IN
SDRAM0
SDRAM1
SDRAM2
SDRAM3
Pin Configuration
VDD 1
SDRAM0 2
SDRAM1 3
VSS 4
BUF_IN 5
SDRAM2 6
VDD 7
SDATA 8
16 SDRAM6
15 SDRAM5
14 VSS
13 VDD
12 SDRAM4
11 SDRAM3
10 VSS
9 SCLK
SDATA
SCLOCK
I2C
I/O
SDRAM6
1
PS8371 05/03/00
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