MC145750VFU 查看數據表（PDF） - Motorola => Freescale
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MC145750VFU Datasheet PDF : 12 Pages
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PNO/TB8
TXD
DS/STBY
DCLK
PLL
ECLK
BLOCK DIAGRAM
TEST TB7:0 M2:0 QPSK DRATE
DAb DAref DAref3:1
PN PATTERN
GENERATOR
INTERFACE
CIRCUIT
TEST
CIRCUIT
π/4–SHIFT
QPSK
ENCODER
TIMING
GENERATOR
ROLL–OFF
FILTERS
10–BIT
DAC
I
Q
10–BIT
DAC
DPLL
Iout
Qout
BW/TB9
DVDD DVSS
ERST/PDN
Cf PC0 PB1 PB2
DAVDD DAVSS
INPUT/OUTPUT TIMING RELATIONS
DS
(INPUT)
DCLK
(INPUT)
12 3 4 5 6 7 8 9
n–1
n 12 3
9 10 11
14 15 16
TXD
(INPUT)
BW
(OUTPUT)
Iout/Qout
(OUTPUT)
n BIT
FIRST SYMBOL
DON’T CARE
LAST SYMBOL
RAMP–UP
(TWO SYMBOL LENGTH)
100% OUTPUT SWING LEVEL
RAMP–DOWN
(TWO SYMBOL LENGTH)
MC145750
2
MOTOROLA
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