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W48S101-04H 查看數據表(PDF) - Cypress Semiconductor

零件编号
产品描述 (功能)
比赛名单
W48S101-04H
Cypress
Cypress Semiconductor Cypress
W48S101-04H Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PRELIMINARY
W48S101-04
Spread Spectrum Clock Generation
The benefits of using Spread Spectrum Clock Generation are
depicted in Figure 3. An EMI emission profile of a clock har-
monic is shown.
Contrast the typical clock EMI with the Cypress Spread Spec-
trum Clock Generation. Notice the spike in the typical clock.
This spike can make systems fail quasi-peak EMI testing. The
FCC and other regulatory agencies test for peak emissions.
With the Cypress clock, the peak energy is much lower (at
least 8 dB) because the energy is spread out across a wider
bandwidth.
5dB/div
SS FTG
Typical C lock
MAX (+0.5%)
-SS% Frequency Span (MHz) +SS%
Figure 3. Typical Clock and SSCG Comparison
MIN (0.5%)
Figure 4. Typical Modulation Profile
4

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