W48S101-04H 查看數據表（PDF） - Cypress Semiconductor
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W48S101-04H Datasheet PDF : 12 Pages
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PRELIMINARY
W48S101-04
Table 5. Additional Frequency Selections through Serial Data Interface Data Bytes
Input Conditions
Output Frequency
Data Byte 3, Bit 3 = 1
Bit 6
SEL_2
Bit 5
SEL_1
Bit 4
SEL_0
CPU, SDRAM
Clocks (MHz)
PCI Clocks
(MHz)
0
0
0
68.5
34.25
0
0
1
75
37.5
0
1
0
83.3
41.6
0
1
1
66.8
33.4
1
0
0
103
34.33
1
0
1
112
37.33
1
1
0
133.3
44.43
1
1
1
100
33.3
Spread Percentage
with Spread Spectrum
turned on
± 0.5% Center
± 0.5% Center
± 0.5% Center
± 0.5% Center
± 0.5% Center
± 0.5% Center
± 0.5% Center
± 0.5% Center
Table 6. Select Function for Data Byte 3, Bits 0:1
Input Conditions
Data Byte 3
Function
Bit 1
Bit 0
CPU0:3
Normal Operation
0
0
Note 2
Test Mode
0
1
X1/2
Spread Spectrum On
1
0
Note 2,
55%±0.5
Three-state
1
1
Hi-Z
Note:
2. CPU and PCI frequency selections are listed in Table 1 and Table 5.
Output Conditions
PCI_F, PCI1:7
Note 2
CPU/2, 3, or 4
Note 2,
55%±0.5
Hi-Z
REF0:2,
IOAPIC0:1
14.318 MHz
X1
14.318 MHz
Hi-Z
48MHZ
48 MHz
X1/2
48 MHz
Hi-Z
24MHZ
24 MHz
X1/4
24 MHz
Hi-Z
7
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