GDC21D401B 查看數據表（PDF） - Hyundai Micro Electronics

零件编号

产品描述 (功能)

比赛名单

GDC21D401B

Video Decoder

Hyundai Micro Electronics 

5. Functional Description

5.1 Initialization and Decoding Start

¥ ¡) Power on reset: \RESET = ‘0’ during several

clocks. In this state, bitstream buffers are flushed,

all decoding controllers are reset, and all internal

registers have default values.

¥ ¢) Decoding start: \RESET = ‘1’. In this state,

the bitstream buffers begin to be filled with input

video bitstreams. First, the bitstream is discarded

until the 1st sequence header code appears, and

then the sequence headers are decoded. Next, the

picture data bitstream is decoded, and it continues

to be decoded unless the buffers are underflow.

GDC21D401B

5.2 Picture Decoding

Picture decoding control state diagram is shown in

Fig 3. Each picture decoding is synchronized with

the external ‘pic_dis_sync‘ signal. If

‘pic_dis_sync‘ signal is changed, command is

executed, then some decoding conditions are

checked (sync parity: top or bottom, underflow,

DTS check and skip check). If the condition is

“repeat”, decoding is suspended until this

condition is ended. If the condition is “skip”, one

picture frame data is skipped. Or else decoding

sync is generated, and controller is suspended for

given ‘pic_dis_sync‘ duration which is

determined by picture format information. If

picture decoding is completed within the given

‘pic_dis_sync’ duration, the state is changed to

wait sync state, and next decoding cycle is

executed. If picture decoding is not completed

within the given duration, the state is changed to

task overrun state. In the task overrun state, as

soon as picture decoding is completed, next

decoding cycle is executed without waiting

‘pic_dis_sync’ transition.

WAIT

SYNC

PIC_DIS_SYNC = or

DEC. COMPLETE

COMMAND

DEC. COMPLETE

WAIT

PIC_DIS_SYNC =

TASK

OVERRUN

or

DEC.

SYNC

GEN.

SKIP

DEC.

CHECK

REPEAT

SKIP

WAIT

Figure 3. Picture Decoding Control State Diagram

11

Share Link: