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MX10EXAQC 查看數據表(PDF) - Macronix International

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MX10EXAQC Datasheet PDF : 55 Pages
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MX10EXA
T2CON Address:418 MSB
Bit Addressable
Reset Value:00H
TF2
EXF2 RCLK0 TCLK0 EXEN2 TR2
LSB
C/T2 CP/RL2
BIT
T2CON.7
T2CON.6
T2CON.5
T2CON.4
T2CON.3
T2CON.2
T2CON.1
T2CON.0
SYMBOL
TF2
EXF2
RCLK0
TCLK0
EXEN2
TR2
C/T2
CP/RL2
FUNCTION
Timer 2 overflow flag. Set by hardware on Timer/Counter overflow. Must be cleared
by software. TF2 will not be set when RCLK0, RCLK1, TCLK0, TCLK1 or T2OE=1.
Timer 2 external flag is set when a capture or reload occurs due to a negative
transition on T2EX (and EXEN2 is set). This flag will cause a Timer 2 interrupt when
this interrupt is enabled. EXF2 is cleared by software.
Receive Clock Flag.
Transmit Clock Flag. RCLK0 and TCLK0 are used to select Timer 2 overflow rate as
a clock source for UART0 instead of Timer T1.
Timer 2 external enable bit allows a capture or reload to occur due to a negative
transition on T2EX.
Start = 1/Stop=0 control for Timer 2.
Timer or counter select.
0 = Internal timer
1 = External event counter (falling edge triggered)
Capture/Reload flag.
If CP/RL2 & EXEN2 = 1 captures will occur on negative transitions of T2EX.
If CP/RL2 = 0, EXEN2 = 1 auto reloads occur with either Timer 2 overflows or
negative transitions at T2EX.
If RCLK or TCLK = 1 the timer is set to auto reload on Timer 2 overflow, this bit has
no effect.
Figure 8. Timer/Counter 2 Control (T2CON) Register
New Timer-Overflow Toggle Output
In the XA, the timer module now has two outputs, which
toggle on overflow from the individual timers. The same
device pins that are used for the T0 and T1 count inputs
are also used for the new overflow outputs. An SFR bit
(TnOE in the TSTAT register) is associated with each
counter and indicates whether Port-SFR data or the over-
flow signal is output to the pin. These outputs could be
used in applications for generating variable duty cycle
PWM outputs (changing the auto-reload register values).
Also variable frequency (Osc/8 to Osc/8,388,608) out-
puts could be achieved by adjusting the prescaler along
with the auto-reload register values. With a 30.0MHz os-
cillator, this range would be 3.58Hz to 3.75MHz.
Timer T2
Timer 2 in the XA is a 16-bit Timer/Counter which can
operate as either a timer or as an event counter. This is
selected by C/T2 in the special function register T2CON.
Upon timer T2 overflow/underflow, the TF2 flag is set,
which may be used to generate an interrupt. It can be
operated in one of three operating modes: auto-reload
(up or down counting), capture, or as the baud rate gen-
erator (for either or both UARTs via SFRs T2MOD and
T2CON). These modes are shown in Table 4.
Capture Mode
In the capture mode there are two options which are se-
lected by bit EXEN2 in T2CON. If EXEN2 = 0, then timer
2 is a 16-bit timer or counter, which upon overflowing
sets bit TF2, the timer 2 overflow bit. This will cause an
interrupt when the timer 2 interrupt is enabled.
If EXEN2 = 1, then Timer 2 still does the above, but with
the added feature that a 1-to-0 transition at external in-
put T2EX causes the current value in the Timer 2 regis-
ters, TL2 and TH2, to be captured into registers RCAP2L
and RCAP2H, respectively. In addition, the transition at
T2EX causes bit EXF2 in T2CON to be set. This will
cause an interrupt in the same fashion as TF2 when the
Timer 2 interrupt is enabled. The capture mode is illus-
trated in Figure 11.
P/N:PM0625 Specifications subject to change without notice, contact your sales representatives for the most update information. REV. 1.0, JUL. 01, 2005
25

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