29103BRA 查看數據表（PDF） - Intersil

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产品描述 (功能)

比赛名单

29103BRA

16K x 1 Asynchronous CMOS Static RAM

Intersil 

Functional Diagram

A0

A1

A2

A3

A4

A12

A13

D

E

W

HM-65262

ROW

ADDRESS

BUFFER

A

7 ROW

A

DECODER

(1 OF 128)

128

7

MEMORY ARRAY

128 X 128

128

COLUMN DECODER

Q

(1 OF 128)

AND I / O CIRCUITRY

A

A

7

7

COLUMN

ADDRESS BUFFERS

2

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