MAX2015EUA-T(2003) 查看數據表（PDF） - Maxim Integrated
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MAX2015EUA-T Datasheet PDF : 10 Pages
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0.1GHz to 2.5GHz, 75dB Logarithmic
Detector/Controller
Controller Mode
The MAX2015 can also be used as a detector/controller
within an AGC loop. Figure 3 depicts one scenario
where the MAX2015 is employed as the controller for a
variable-gain PA. As shown in the figure, the MAX2015
monitors the output of the PA through a directional cou-
pler. An internal integrator (Figure 2) compares the
detected signal with a reference voltage determined by
VSET. The integrator, acting like a comparator, increas-
es or decreases the voltage at OUT, according to how
closely the detected signal level matches the VSET ref-
erence. The MAX2015 adjusts the power of the PA to a
level determined by the voltage applied to SET. With R1 =
0Ω, the controller mode slope is approximately
19mV/dB (RF = 100MHz).
Layout Considerations
As with any RF circuit, the layout of the MAX2015 circuit
affects the device’s performance. Use an abundant num-
ber of ground vias to minimize RF coupling. Place the
input capacitors (C1, C2) and the bypass capacitors
(C3–C6) as close to the IC as possible. Connect the
bypass capacitors to the ground plane with multiple vias.
POWER AMPLIFIER
TRANSMITTER
SET-POINT
DAC
GAIN-CONTROL INPUT
COUPLER
LOGARITHMIC IN
OUT
DETECTOR
SET
20kΩ
20kΩ
MAX2015
Figure 3. System Diagram for Automatic Gain-Control Loop
Pin Configuration
VS
R4
1 VCC
C6
C5
DETECTORS
OUT 8
VOUT
C1
2 INHI
RFIN
20kΩ SET 7
VSET
C2
3 INLO
20kΩ
6
GND
4 VCC
MAX2015
5
PWDN
C4
C3
TOP VIEW
VCC 1
INHI 2
INLO 3
VCC 4
MAX2015
µMAX
8 OUT
7 SET
6 GND
5 PWDN
Chip Information
TRANSISTOR COUNT: 3157
PROCESS: BiCMOS
Figure 2. Controller-Mode Typical Application Circuit
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