Nexperia
74HC595-Q100; 74HCT595-Q100
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state
VI
SHCP input
GND
VI
DS input
GND
VM
t su
th
VM
t su
th
VOH
Q7S output
VM
VOL
mna560
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 11. Data set-up and hold times
VI
MR input
VM
GND
VI
tW
t rec
SHCP input
VM
GND
VOH
t PHL
Q7S output
VM
VOL
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 12. Master reset to output propagation delays
mna561
74HC_HCT595_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 28 February 2017
© Nexperia B.V. 2017. All rights reserved.
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