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A2V64S40 查看數據表(PDF) - Unspecified

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A2V64S40 Datasheet PDF : 79 Pages
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Powerchip Semiconductor Corporation
A2V64S40CTP
64M Single Data Rate Synchronous DRAM
General Description
The A2V64S40CTP is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by
16 bits. Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on
every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same
device to be useful for a variety of high bandwidth, high performance memory system applications.
Features
3.3V power supply
LVTTL compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
- CAS latency (2 & 3)
- Burst length (1, 2, 4, 8 & Full page)
- Burst type (Sequential & Interleave)
Pin Configurations
All inputs are sampled at the positive going
edge of the system clock
Auto & self refresh
64ms refresh period (4K cycle)
Burst read single write operation
LDQM & UDQM for masking
Ordering Information:
Frequency Speed(ns)
Order Part Number
Type
Standard Pb-Free
200MHZ
5 A2V64S40CTP -5
-G5
166MHZ
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143MHZ
6 A2V64S40CTP -6
-G6
7 A2V64S40CTP -7
-G7
133MHZ 7.5 A2V64S40CTP -75 -G75
Package
400mil
TSOP-2
400mil
TSOP-2
400mil
TSOP-2
400mil
TSOP-2
Revision 1.0
Page 1/38
March, 2005
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