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A2V64S40 查看數據表(PDF) - Unspecified

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A2V64S40 Datasheet PDF : 79 Pages
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Powerchip Semiconductor Corporation
A2V64S40CTP
64M Single Data Rate Synchronous DRAM
DC CHARACTERISTICS
Recommended operating conditions (Voltage referenced to VSS = 0V, TA = -25 to 85° C for Extended, 0 to 70° C for Commercial)
Parameter
Symbol
Test Condition
Version
Unit
-5 -6 -7 -75
Note
Operating Current
(One Bank Active)
Burst length = 1
ICC1 tRC . tRC(min)
IO = 0 mA
120 110 100 95 mA
1
Precharge Standby Current in
power-down mode
Precharge Standby Current
in non power-down mode
Active Standby Current
in power-down mode
Active Standby Current
in non power-down mode
(One Bank Active)
ICC2P CKE . VIL(max), tCC = 10ns
ICC2PS CKE & CLK . VIL(max), tCC =
2
2
2
2
mA
1
1
1
1
ICC2N
CKE . VIH(min), CS . VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
20
20
20
20
mA
ICC2NS
CKE . VIH(min), CLK . VIL(max), tCC =
Input signals are stable
15 15 15 15
ICC3P CKE . VIL(max), tCC = 10ns
ICC3PS CKE & CLK . VIL(max), tCC =
10 10 10 10 mA
10 10 10 10
ICC3N
CKE . VIH(min), CS . VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
30
30
30
30
ICC3NS
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CKE . VIH(min), CLK . VIL(max), tCC =
Input signals are stable
mA
25 25 25 25
Operating Current
(Burst Mode)
IO = 0 mA
ICC4
Page burst
4Banks Activated
tCCD = 2CLKs
Refresh Current
Self Refresh Current
ICC5
ICC6
tARFC . tARFC(min)
CKE . 0.2V
NOTES:
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ).
160 150 140 130 mA
1
180 180 180 180 mA
2
1
1
1
1 mA
Revision 1.0
Page 4/38
March, 2005
Datasheet pdf - http://www.DataSheet4U.net/

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