Philips Semiconductors
2.5V/3.3V 18-bit bus-interface D-type flip-flop
with reset and enable (3-State)
Product specification
74ALVT16823
AC WAVEFORMS (Continued)
For all waveforms, VM = 1.5V or VCC/2 whichever is less
The shaded areas indicate when the input is permitted to change for
predictable output performance.
nOE
nQx
VM
tPZL
VM
VM
tPLZ
3.0V or VCC
whichever
is less
0V
3.0V or VCC
whichever
is less
VOL +0.3V
VOL
SH00021
Waveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORM
VCC
VIN
VOUT
RL
PULSE
GENERATOR
D.U.T.
RT
CL
RL
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST
SWITCH
tPHZ/tPZH
tPLZ/tPZL
tPLH/tPHL
GND
6V or VCC x 2
open
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
6V or
VCC x 2
90%
OPEN
NEGATIVE
GND
PULSE
tW
VM
10%
tTHL (tF)
VM
10%
90%
AMP (V)
0V
tTLH (tR)
POSITIVE
PULSE
10%
tTLH (tR)
90%
VM
tW
90%
VM
tTHL (tF)
AMP (V)
10%
0V
VM = 1.5V or VCC / 2, whichever is less
Input Pulse Definition
FAMILY
74ALVT16
INPUT PULSE REQUIREMENTS
Amplitude Rep. Rate
3.0V or VCC
whichever
is less
≤10MHz
tW
tR
500ns ≤2.5ns
tF
≤2.5ns
SW00162
1998 Jun 12
9