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A6173081S 查看數據表(PDF) - AMIC Technology

零件编号
产品描述 (功能)
比赛名单
A6173081S
AMICC
AMIC Technology AMICC
A6173081S Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
A6173081 Series
Preliminary
128K X 8 BIT HIGH SPEED CMOS SRAM
Features
n Center power pinout
n Supply voltage: 5V±10%
n Access times: 12/15 ns (max.)
n Current: Operating: -12: 170mA (max.)
-15: 165mA (max.)
Standby: TTL: 25mA (max.)
CMOS: 8mA (max.)
General Description
The A6173081 is a high-speed 1,048,576-bit static
random access memory organized as 131,072 words by
8 bits and operates on a 5V power supply. It is built
using high performance CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Pin Configurations
n SOJ
n Full static operation, no clock or refreshing required
n All inputs and outputs are directly TTL compatible
n Common I/O using three-state output
n Data retention voltage: 3V (min.)
n Available in 32-pin 300mil / 400mil SOJ packages
Minimum standby power is drawn by this device when
chip enable is disable, independent of the other input
levels.
Data retention is guaranteed at a power supply voltage
as low as 3V.
A0
1
A1
2
A2
3
A3
4
CE
5
I/O0
6
I/O1
7
VCC
8
GND
9
I/O2
10
I/O3
11
WE
12
A4
13
A5
14
A6
15
A7
16
32
A16
31
A15
30
A14
29
A13
28
OE
27
I/O7
26
I/O6
25
GND
24
VCC
23
I/O5
22
I/O4
21
A12
20
A11
19
A10
18
A9
17
A8
PRELIMINARY (July, 2000, Version 0.0)
1
AMIC Technology, Inc.

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