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AD5426 查看數據表(PDF) - Analog Devices

零件编号
产品描述 (功能)
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AD5426 Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD5426/AD5432/AD5443
PIN CONFIGURATION
IOUT1 1
IOUT2 2
GND 3
SCLK 4
SDIN 5
AD5426/
AD5432/
AD5443
(Not to Scale)
10 RFB
9 VREF
8 VDD
7 SDO
6 SYNC
PIN FUNCTION DESCRIPTIONS
Pin No. Mnemonic Function
1
IOUT1
DAC Current Output.
2
IOUT2
DAC Analog Ground. This pin should normally be tied to the analog ground of the system.
3
GND
Ground Pin.
4
SCLK
Serial Clock Input. By default, data is clocked into the input shift register on the falling edge of the serial
clock input. Alternatively, by means of the serial control bits, the device may be configured such that data is
clocked into the shift register on the rising edge of SCLK.
5
SDIN
Serial Data Input. Data is clocked into the 16-bit input register on the active edge of the serial clock input.
By default, on power-up, data is clocked into the shift register on the falling edge of SCLK. The control bits
allow the user to change the active edge to rising edge.
6
SYNC
Active Low Control Input. This is the frame synchronization signal for the input data. When SYNC goes
low, it powers on the SCLK and DIN buffers, and the input shift register is enabled. Data is loaded to the
shift register on the active edge of the following clocks (power-on default is falling clock edge). In standalone
mode, the serial interface counts clocks and data is latched to the shift register on the 16th active clock edge.
7
SDO
Serial Data Output. This allows a number of parts to be daisy-chained. By default, data is clocked into the
shift register on the falling edge and out via SDO on the rising edge of SCLK. Data will always be clocked
out on the alternate edge to loading data to the shift register. Writing the Readback control word to the
shift register makes the DAC register contents available for readback on the SDO pin, clocked out on the
opposite edges to the active clock edge.
8
VDD
9
VREF
10
RFB
Positive Power Supply Input. These parts can be operated from a supply of 3 V to 5.5 V.
DAC Reference Voltage Input.
DAC Feedback Resistor pin. Establish voltage output for the DAC by connecting to external amplifier output.
–6–
REV. 0

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