AD7928BRU-REEL7 查看數據表（PDF） - Analog Devices

零件编号

产品描述 (功能)

比赛名单

AD7928BRU-REEL7

8-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 20-Lead TSSOP

Analog Devices 

AD7908/AD7918/AD7928

PIN CONFIGURATION

20-Lead TSSOP

SCLK 1

20 AGND

DIN 2

19 VDRIVE

CS

AGND

AVDD

AVDD

REFIN

3 AD7908/ 18

4 AD7918/ 17

5 AD7928 16

6 TOP VIEW 15

(Not to Scale)

7

14

DOUT

AGND

VIN0

VIN1

VIN2

AGND 8

13 VIN3

VIN7 9

12 VIN4

VIN6 10

11 VIN5

Pin No.

1

Mnemonic

SCLK

2

DIN

3

CS

4, 8, 17, 20 AGND

5, 6

7

16–9

AVDD

REFIN

VIN0–VIN7

18

DOUT

19

VDRIVE

PIN FUNCTION DESCRIPTIONS

Function

Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock

input is also used as the clock source for the AD7908/AD7918/AD7928’s conversion process.

Data In. Logic input. Data to be written to the AD7908/AD7918/AD7928’s Control Register is provided on

this input and is clocked into the register on the falling edge of SCLK (see the Control Register section).

Chip Select. Active low logic input. This input provides the dual function of initiating conversions on

the AD7908/AD7918/AD7928, and also frames the serial data transfer.

Analog Ground. Ground reference point for all analog circuitry on the AD7908/AD7918/AD7928.

All analog input signals and any external reference signal should be referred to this AGND voltage.

All AGND pins should be connected together.

Analog Power Supply Input. The AVDD range for the AD7908/AD7918/AD7928 is from 2.7 V to 5.25 V.

For the 0 V to 2 ϫ REFIN range, AVDD should be from 4.75 V to 5.25 V.

Reference Input for the AD7908/AD7918/AD7928. An external reference must be applied to this input.

The voltage range for the external reference is 2.5 V ± 1% for specified performance.

Analog Input 0 through Analog Input 7. Eight single-ended analog input channels that are multiplexed

into the on-chip track-and-hold. The analog input channel to be converted is selected by using the

address bits ADD2 through ADD0 of the Control Register. The address bits, in conjunction with the SEQ

and SHADOW bits, allow the Sequencer to be programmed. The input range for all input channels

can extend from 0 V to REFIN or 0 V to 2 ϫ REFIN as selected via the RANGE bit in the Control

Register. Any unused input channels must be connected to AGND to avoid noise pickup.

Data Out. Logic output. The conversion result from the AD7908/AD7918/AD7928 is provided on

this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The

data stream from the AD7908 consists of one leading zero, three address bits indicating which channel

the conversion result corresponds to, followed by the eight bits of conversion data, followed by four

trailing zeros, provided MSB first; the data stream from the AD7918 consists of one leading zero,

three address bits indicating which channel the conversion result corresponds to, followed by the 10 bits

of conversion data, followed by two trailing zeros, also provided MSB first; the data stream from the

AD7928 consists of one leading zero, three address bits indicating which channel the conversion result

corresponds to, followed by the 12 bits of conversion data, provided MSB first. The output coding

may be selected as straight binary or twos complement via the CODING bit in the Control Register.

Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the serial

interface of the AD7908/AD7918/AD7928 will operate.

–10–

REV. A

Share Link: