AD8158 查看數據表（PDF） - Analog Devices

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AD8158

6.5 Gbps Quad Buffer Mux/Demux

Analog Devices 

AD8158

50Ω CABLES

50Ω CABLES

50Ω CABLES

DATA OUT 2

2 FR4 TEST BACKPLANE 2

2 INPUT OUTPUT 2

PIN

PIN

2

50Ω

PATTERN

GENERATOR

DIFFERENTIAL

TP1 STRIPLINE TRACES

8mils WIDE, 8mils SPACE,

8mils DIELECTRIC HEIGHT

AD8158

TP2 AC-COUPLED

EVALUATION

BOARD

HIGH

TP3

SPEED

SAMPLING

OSCILLOSCOPE

TRACE LENGTHS = 20 INCHES,

40 INCHES

25ps/DIV

REFERENCE EYE DIAGRAM AT TP1

Figure 7. Input Equalization Test Circuit

25ps/DIV

Figure 8. 6.5 Gbps Input Eye, 20 Inch FR4 Input Channel (TP2 from Figure 7)

25ps/DIV

Figure 10. 6.5 Gbps Output Eye, 20 Inch FR4 Input Channel (TP3 from Figure 7)

25ps/DIV

Figure 9. 6.5 Gbps Input Eye, 40 Inch FR4 Input Channel (TP2 from Figure 7)

25ps/DIV

Figure 11. 6.5 Gbps Output Eye, 40 Inch FR4 Input Channel (TP3 from Figure 7)

Rev. 0 | Page 10 of 36

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