AD8196 查看數據表（PDF） - Analog Devices
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AD8196 Datasheet PDF : 24 Pages
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AD8196
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Preliminary Technical Data
NOTES
1.
THE AD8196 LFCSP HAS AN EXPOSED PADDLE (ePAD) ON THE UNDERSIDE OF THE PACKAGE WHICH AIDS IN HEAT
DISSIPATION. THE ePAD MUST BE ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER TO MEET THERMAL
SPECIFICATIONS.
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
1, 10, 33, 42
AVCC
2
IN_A0
3
IP_A0
4, 13, 30, 39, ePAD
AVEE
5
IN_A1
6
IP_A1
7, 36
VTTI
8
IN_A2
9
IP_A2
11
IN_A3
12
IP_A3
14
I2C_ADDR
15, 21
DVCC
16
ON0
17
OP0
18, 24
VTTO
19
ON1
20
OP1
22
ON2
23
OP2
25
ON3
26
OP3
27
RESETEE
AA
EA
28
I2C_SCL
29
I2C_SDA
Type 1
Power
HS I
HS I
Power
HS I
HS I
Power
HS I
HS I
HS I
HS I
Control
Power
HS O
HS O
Power
HS O
HS O
HS O
HS O
HS O
HS O
Control
Control
Control
Description
Positive Analog Supply. 3.3 V nominal.
High Speed Input Complement.
High Speed Input.
Negative Analog Supply. 0 V nominal.
High Speed Input Complement.
High Speed Input.
Input Termination Supply. Nominally connected to AVCC.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
I2C Address LSB.
Positive Digital Power Supply. 3.3 V nominal.
High Speed Output Complement.
High Speed Output.
Output Termination Supply. Nominally connected to AVCC.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
Configuration Registers Reset. This pin is normally pulled up to DVCC.
I2C Clock.
I2C Data.
PrA | Page 6 of 24
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