AD9396 查看數據表（PDF） - Analog Devices
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AD9396 Datasheet PDF : 48 Pages
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AD9396
SPECIFICATIONS
ANALOG INTERFACE ELECTRICAL CHARACTERISTICS
VDD, VD = 3.3 V, DVDD = PVDD = 1.8 V, ADC clock = maximum.
Table 1.
Parameter
RESOLUTION
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
No Missing Codes
ANALOG INPUT
Input Voltage Range
Minimum
Maximum
Gain Tempco
Input Bias Current
Input Full-Scale Matching
Offset Adjustment Range
SWITCHING PERFORMANCE1
Maximum Conversion Rate
Minimum Conversion Rate
Data to Clock Skew
SERIAL PORT TIMING
tBUFF
tSTAH
tDHO
tDAL
tDAH
tDSU
tSTASU
tSTOSU
HSYNC Input Frequency
Maximum PLL Clock Rate
Minimum PLL Clock Rate
PLL Jitter
Sampling Phase Tempco
DIGITAL INPUTS (5 V Tolerant)
Input Voltage, High (VIH)
Input Voltage, Low (VIL)
Input Current, High (IIH)
Input Current, Low (IIL)
Input Capacitance
DIGITAL OUTPUTS
Output Voltage, High (VOH)
Output Voltage, Low (VOL)
Duty Cycle, DATACK
Output Coding
Temp
Test Level Min
AD9396KSTZ-100
Typ
Max
8
25°C I
25°C I
Full
–0.6
+1.6/–1.0
±1.0 ±2.1
Guaranteed
Full VI
Full VI
25°C V
25°C V
25C VI
Full VI
Full V
Full VI
Full VI
Full IV
Full VI
Full VI
Full VI
Full VI
Full VI
Full VI
Full VI
Full VI
Full VI
Full VI
Full IV
25°C IV
Full IV
Full VI
Full VI
Full V
Full V
25°C V
Full VI
Full VI
Full V
0.5
1.0
100
0.2
1.25
5
1.50
7
50
100
10
−0.5
+2.0
4.7
4.0
0
4.7
4.0
250
4.7
4.0
15
110
100
12
700
15
2.6
0.8
−82
82
3
VDD − 0.1
45
0.4
50
55
Binary
AD9396KSTZ-150
Min
Typ
Max
8
±0.7 +1.8/–1.0
±1.1 ±2.25
Guaranteed
0.5
1.0
220
1
1.25
5
1.50
7
50
150
10
−0.5
+2.0
4.7
4.0
0
4.7
4.0
250
4.7
4.0
15
110
150
12
700
15
2.6
0.8
−82
82
3
VDD − 0.1
45
0.4
50
55
Binary
Unit
Bits
LSB
LSB
V p–p
V p–p
ppm/°C
μA
%FS
%FS
%FS
MSPS
MSPS
ns
μs
μs
μs
μs
μs
ns
μs
μs
KHz
MHz
MHz
ps p-p
ps/°C
V
V
μA
μA
pF
V
V
%
Rev. 0 | Page 3 of 48
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