ADIS16201 查看數據表（PDF） - Analog Devices

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ADIS16201

Programmable Dual-Axis Inclinometer/Accelerometer

Analog Devices 

ADIS16201

Data Sheet

Parameter

DAC OUTPUT

Resolution

Relative Accuracy

Differential Nonlinearity

Offset Error

Gain Error

Output Range

Output Impedance

Output Settling Time

LOGIC INPUTS

Input High Voltage, VINH

Input Low Voltage, VINL

Logic 1 Input Current, IINH

Logic 0 Input Current, IINL

Input Capacitance, CIN

DIGITAL OUTPUTS

Output High Voltage, VOH

Output Low Voltage, VOL

SLEEP TIMER

Timeout Period3

FLASH MEMORY

Endurance4

Data Retention5

CONVERSION RATE

Minimum Conversion Time

Maximum Conversion Time

Maximum Throughput Rate

Minimum Throughput Rate

POWER SUPPLY

Operating Voltage Range VDD

Power Supply Current

Turn-On Time6

Conditions

Min

5 kΩ/100 pF to GND

For Code 101 to Code 4095

VIH = VDD

VIL = 0 V

ISOURCE = 1.6 mA

ISINK = 1.6 mA

TJ = 85°C

2.0

2.4

0.5

20,000

20

3.0

Normal mode, SMPL_TIME ≥

0x08 (fs ≤ 910 Hz), at 25°C

Fast mode, SMPL_TIME ≤ 0x07

(fs ≥ 1024 Hz), at 25°C

Sleep mode, at 25°C

Typ

Max

12

4

1

±5

±0.5

0 to 2.5

2

10

0.8

±0.2

±1

−40

−60

10

0.4

128

244

484

4096

2.066

3.3

3.6

11

14

36

42

500

750

130

Unit

Bits

LSB

LSB

mV

%

V

Ω

µs

V

V

µA

μA

pF

V

V

Seconds

Cycles

Years

μs

ms

SPS

SPS

V

mA

mA

µA

ms

1 Guaranteed by iMEMs packaged part testing, design, and/or characterization.

2 Self-test response changes as the square of VDD.

3 Guaranteed by design.

4 Endurance is qualified as per JEDEC Standard 22 Method A117 and measured at −40°C, +25°C, +85°C, and +125°C.

5 Retention lifetime equivalent at junction temperature (TJ) 85°C as per JEDEC Standard 22 Method A117. Retention lifetime decreases with junction temperature.

6 The start-up time defines the time from VDD > 3.0 V to the first output register update. This parameter does not account for filter settling, which depends on the

SMPL_PRD and AVG_CNT settings.

Rev. C | Page 4 of 32

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