ADP3415 查看數據表（PDF） - ON Semiconductor
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ADP3415 Datasheet PDF : 10 Pages
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FEATURES
All-in-One Synchronous Buck Driver
One PWM Signal Generates Both Drives
Anticross Conduction Protection Circuitry
Programmable Transition Delay
Zero-Crossing Synchronous Drive Control
Synchronous Override Control
Undervoltage Lockout
Shutdown Quiescent Current <100 A
APPLICATIONS
Mobile Computing CPU Core Power Converters
Multiphase Desktop CPU Supplies
Single-Supply Synchronous Buck Converters
Standard-to-Synchronous Converter Adaptations
GENERAL DESCRIPTION
The ADP3415 is a dual MOSFET driver optimized for driving
two N-channel FETs that are the two switches in the nonisolated
synchronous buck power converter topology. Each driver size is
optimized for performance in notebook PC regulators for CPUs
in the 20 A range. The high-side driver can be bootstrapped atop
the switched node of the buck converter as needed to drive the
upper switch and is designed to accommodate the high voltage
slew rate associated with high performance, high frequency
switching. The ADP3415 features an overlapping protection
circuit (OPC); undervoltage lockout (UVLO) that holds the
switches off until the driver is assured of having sufficient voltage
for proper operation; a programmable transition delay; and a
synchronous drive disable pin. The quiescent current, when the
device is disabled, is less than 100 µA.
The ADP3415 is specified over the extended commercial
temperature range of 0°C to 100°C and is available in a 10-lead
MSOP package.
Dual MOSFET Driver
with Bootstrapping
ADP3415
FUNCTIONAL BLOCK DIAGRAM
VCC
IN
SD
DLY
DRVLSD
GND
UVLO
OVERLAP
PROTECTION
CIRCUIT
ADP3415
BST
DRVH
SW
VCC
DRVL
5V
VDCIN
FROM DUTY RATIO
MODULATOR
FROM SYSTEM
ENABLE CONTROL
FROM SYSTEM
STATE LOGIC
VCC
IN
BST
SD
DRVH
ADP3415
DRVLSD
SW
DLY
DRVL
GND
Figure 1. Typical Application Circuit
VOUT
©2010 SCILLC. All rights reserved.
May 2010 - Rev. 6
Publication Order Number:
ADP3415/D
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