BS616LV4020 查看數據表（PDF） - Brilliance Semiconductor

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BS616LV4020

Very Low Power/Voltage CMOS SRAM 256K x 16 or 512K x 8 bit switchable

Brilliance Semiconductor 

BSI

„ DATA RETENTION CHARACTERISTICS ( TA = 0 to + 70oC )

SYMBOL

PARAMETER

TEST CONDITIONS

VDR

Vcc for Data Retention

CE1 Њ Vcc - 0.2V or CE2 Љ 0.2V ;

VIN Њ Vcc - 0.2V or VIN Љ 0.2V

ICCDR

Data Retention Current

CE1 Њ Vcc - 0.2V or CE2 Љ 0.2V

VIN Њ Vcc - 0.2V or VIN Љ 0.2V

tCDR

Chip Deselect to Data

Retention Time

See Retention Waveform

tR

Operation Recovery Time

1. Vcc = 1.5V, TA = + 25OC

2. tRC = Read Cycle Time

BS616LV4020

MIN. TYP. (1) MAX.

1.5

--

--

UNITS

V

--

0.3

2

uA

0

--

--

ns

TRC (2)

--

--

ns

„ LOW VCC DATA RETENTION WAVEFORM (1) ( CE1 Controlled )

Vcc

CE1

Vcc

t CDR

VIH

Data Retention Mode

VDR Њ 1.5V

CE1 Њ Vcc - 0.2V

Vcc

tR

VIH

„ LOW VCC DATA RETENTION WAVEFORM (2) ( CE2 Controlled )

Vcc

CE2

Vcc

t CDR

VIL

Data Retention Mode

VDR Њ 1.5V

CE2 Љ 0.2V

Vcc

tR

VIL

R0201-BS616LV4020

5

Revision 2.3

April 2002

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