SAA7381 查看數據表（PDF） - Philips Electronics
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产品描述 (功能)
比赛名单
SAA7381 Datasheet PDF : 108 Pages
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Philips Semiconductors
ATAPI CD-R block decoder
Objective specification
SAA7381
SYMBOL
n.c.
SDI1
n.c.
SFSY
RCK
SUBI
n.c.
CFLG
C2P0
DGND5
IECO
MCK
SCK2
WS2
SDO2
GND
CROUT
CRIN
VDDA
Iref
POR
TEST1
TEST2
RESET
DD7
DD8
DD6
VDDD(pad1)
DGND6
DD9
DD5
DD10
DD4
PIN
35 to 38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
TYPE
DRIVE/
THRESHOLD
GROUPING
DESCRIPTION
−
−
−
not connected
I
C
I2S-bus I/O data input from CD engine
O
M
not connected
I/O
L/C
subcode I/O 3-wire subcode sync input/output
I/O
L/C
3-wire subcode clock input/output
I
C
Q and R-W subcode input
O
L
not connected
I
C
I2S-bus input CD error corrector flags and absolute time
sync
I
C
CD C2 error correction flag input for ERCO
−
−
−
digital ground 5
O
M
multimedia IEC 958 output
I/O
M/C
multimedia 256fs or 384fs clock for multimedia master
output
clock/IEC 958 clock or divided system clock for
CD-DSP
I/O
L/C
multimedia I2S-bus bit clock input/output
I/O
L/C
I2S-bus word select strobe input/output
O
M
I2S-bus data output to DAC/video decoder
−
−
−
ground
O
crystal pad crystal oscillator crystal oscillator output
I
crystal pad
crystal oscillator/clock input
−
−
−
analog supply voltage
analog current input clock generator VCO reference current
I Schmitt trigger
system
power-on reset (active LOW)
I
C
test
mode control input test pins
I
C
I Schmitt trigger
host
ATAPI bus reset input from host (active LOW)
I/O
AL/T
host
data bus input/output
I/O
AL/T
I/O
AL/T
−
−
−
digital peripheral supply voltage 1
−
−
−
digital ground 6
I/O
AL/T
I/O
AL/T
I/O
AL/T
I/O
AL/T
host
data bus pin order of ATAPI interface matches
the pinning of the 40-way IDE connector (slew
rate limiting by control of drive capability into
capacitive load of ATA bus)
1997 Aug 12
7
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