SAA7381 查看數據表（PDF） - Philips Electronics
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SAA7381 Datasheet PDF : 108 Pages
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Philips Semiconductors
ATAPI CD-R block decoder
Objective specification
SAA7381
SYMBOL
n.c.
DD11
DD3
DD12
DD2
DD13
DD1
DD14
DD0
DD15
DMARQ/
DMACK
DGND7
VDDD(pad2)
DIOW
DIOR
IORDY
DMACK/
DMARQ
INTRQ
DGND8
VDDD(pad3)
IOCS16
DA1/DBWR
PDIAG
DA0
DA2/DBRD
CS0/
SCSICS
CS1
DASP
INT2
PIN
71 to 74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
TYPE
−
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
DRIVE/
THRESHOLD
−
AL/T
AL/T
AL/T
AL/T
AL/T
AL/T
AL/T
AL/T
AL/T
AL
−
−
−
−
I
L/T
I
L/T
O
AH
I
T
A
−
−
−
−
O
AH
I/O
L/T
I/O
AL/T
I/O
L/T
I/O
L/T
I/O
L/T
I/O
L/T
I/O
AH/T
O
L
GROUPING
−
host
host
−
−
host
host
host
host
host
−
−
host
host
host
host
host
host
host
host
sub-CPU
DESCRIPTION
not connected
data bus; pin order of ATAPI interface matches
the pinning of the 40-way IDE connector (slew
rate limiting by control of drive capability into
capacitive load of ATA bus)
DMA request/SCSI DMA acknowledge output
(active LOW)
digital ground 7
digital peripheral supply voltage 2
write cycle write enable/control register write
input (active LOW)
read cycle read enable/control register read
input (active LOW)
device is ready to transfer data output
(active LOW)
DMA acknowledge (active LOW)/SCSI DMA
request input
host interrupt request (NB 3-state output)
digital ground 8
digital peripheral supply voltage 3
I/O port is 16-bit output (active LOW)
address wire 1/DMA from generic interface is
output from the SAA7381 (active LOW)
ATAPI passed diagnostics input/output
(active LOW)
address wire 0 input/output
address wire 2/DMA from generic interface is
input to the SAA7381 (active LOW)
chip select 1FX/generic interface chip select
(active LOW)
chip select 3FX input/output (active LOW)
device active slave present input/output (active
LOW)
sub-CPU interrupt output from the SAA7381
drive block and UART
1997 Aug 12
8
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