CS5509-ASZ(2009) 查看數據表（PDF） - Cirrus Logic
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CS5509-ASZ Datasheet PDF : 24 Pages
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CS5509
ANALOG CHARACTERISTICS (TA = 25 °C; VA+ = 5V ±5%; VD+ = 3.3V ±5%; VREF+ = 2.5V,
VREF- = 0V; fCLK = 32.768 kHz; Bipolar Mode; Rsource = 40 Ω with a 10 nF to GND at AIN; AIN- = 2.5V; unless oth-
erwise specified.) (Notes 1 and 2)
Parameter*
Min
Accuracy
Linearity Error
fCLK = 32.768 kHz
-
fCLK = 165 kHz
-
fCLK = 247.5 kHz
-
fCLK = 330 kHz
-
Differential Nonlinearity
-
Full-scale Error
Full-scale Drift
(Note 3)
-
(Note 4)
-
Unipolar Offset
Unipolar Offset Drift
(Note 3)
-
(Note 4)
-
Bipolar Offset
(Note 3)
-
Bipolar Offset Drift
(Note 4)
-
Noise (Referred to Output)
-
Analog Input
Analog Input Range
Unipolar
-
Bipolar
(Notes 5 and 6)
-
Common Mode Rejection
fCLK = 32.768 kHz
Input Capacitance
dc
50, 60 Hz
-
(Note 2) 120
-
DC Bias Current
Power Supplies
(Note 1)
-
DC Power Supply Currents
Power Dissipation
ITotal
-
IAnalog
-
IDigital
-
(Note 7)
-
Power Supply Rejection
-
Typ
0.0015
0.0015
0.0015
0.005
±0.25
±0.25
±0.5
±0.5
±0.5
±0.25
±0.25
0.16
0 to +2.5
±2.5
105
-
15
5
Max
Unit
0.003
0.003
0.003
0.0125
±0.5
±2
-
±2
-
±1
-
-
± %FS
± %FS
± %FS
± %FS
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSBrms
-
V
-
V
-
dB
-
dB
-
pF
-
nA
350
450
µA
300
-
µA
60
-
µA
1.7
2.25
mW
80
-
dB
Notes: 1. Both source resistance and shunt capacitance are critical in determining the CS5509's source
impedance requirements. Refer to the text section Analog Input Impedance Considerations.
2. Specifications guaranteed by design, characterization and/or test.
3. Applies after calibration at the temperature of interest.
4. Total drift over the specified temperature range since calibration at power-up at 25 °C.
5. The input is differential. Therefore, GND ≤ Signal + Common Mode Voltage ≤ VA+.
6. The CS5509 can accept input voltages up to the VA+ analog supply. In unipolar mode the CS5509 will
output all 1's if the dc input magnitude ((AIN+) - (AIN-)) exceeds ((VREF+) - (VREF-)) and will output all
0's if the input becomes more negative than 0 Volts. In bipolar mode the CS5509 will output all 1's if the
dc input magnitude ((AIN+) - (AIN-)) exceeds ((VREF+) - (VREF-)) and will output all 0's if the input
becomes more negative in magnitude than -((VREF+) - (VREF-)).
7. All outputs unloaded. All inputs CMOS levels.
* Refer to the Specification Definitions immediately following the Pin Description Section.
2
DS125F3
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