CDB6403 查看數據表（PDF） - Cirrus Logic

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CDB6403

Echo-Cancelling Codec

Cirrus Logic 

CS6403

ADC CHARACTERISTICS (TA = 25 °C; All DVDD, AVDD, and PVDD = 5.0V, Digital Input Levels:

Logic 0 = 0V, Logic 1 = DVDD; Signal test frequency 1kHz, word rate (Fs) = 8kHz, audio signal measurement

bandwidth is 20Hz to 4kHz; Microphone amp gain = 0dB; SPRKOUT outputs connected to 8Ω load; CLKIN fre-

quency = 8.192MHz; unless otherwise specified) Note 1.

Parameter

Symbol Min

Typ

Max Units

ADC Resolution With No Missing Codes

12

-

-

bits

Instantaneous Dynamic Range

IDR

67

72

-

dB

Total Harmonic Distortion at -0.5dBFS signal level

THD

-

0.01

0.05

%

Gain Drift

(Note 2)

-

150

-

ppm/°C

Offset Error

-

0

2

LSB

Full Scale Input Voltage

Input Resistance

Input Capacitance

(at MICIN)

(at MICIN)

(Note 3)

(Note 2)

(Note 2)

0.85

1.0

25

-

-

15

1.1

Vp

-

kΩ

-

pF

Sample Rate

Fs

-

8

-

kHz

Microphone Amp Gain

(switchable on/off)

24

26

28

dB

Anti-aliasing Rejection

-

30

-

dB

Power Supply Rejection

(1kHz)

PSR

40

-

-

dB

Frequency Response

-0.6

-

0.6

dB

Transition Band

0.45

-

0.6

Fs

Stop Band Rejection

70

-

-

dB

VREF Reference Voltage Output

-

2.0

-

V

VCM Voltage Output

Group Delay

constant load only, >100 kΩ

(Note 4)

-

1.0

-

V

-

1

-

ms

Group Delay Variations vs. Frequency

(Note 4)

-

0.0

-

µs

Notes:

1. Bench testing is done with Crystal part CXT8192 driving CLKIN, automated device testing utilizes

test system provided clock sources.

2. Guaranteed by design/characterization.

3. This is the peak input voltage (in volts) with the mic amp gain set to 0 dB. Peak-to-peak voltage is

2x peak. Input signals will be properly clipped if the peak signal is greater than full scale, but less

than 2x full scale.

4. This group-delay specification is for the ADC only; additional group delay is introduced by the

AGC and high-pass filter that is implemented on the CS6403 in software.

2

DS192PP6

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