CDB6403 查看數據表（PDF） - Cirrus Logic

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CDB6403

Echo-Cancelling Codec

Cirrus Logic 

CS6403

OVERVIEW

Echo Cancellation in the CS6403

In hands-free speakerphones, the signal from the

far end may echo about the near-end environ-

ment and then be received at the near-end

microphone. When heard at the far end, this

echo signal can be very annoying, particularly if

the signal is delayed by transmission or signal-

processing delays.

Voice switching is a particularly simple tech-

nique for eliminating this echo, but since it

imposes half-duplex communication, it seriously

compromises conversation quality.

Echo cancellation can provide high-quality, full-

duplex communication, but typically must be

implemented using expensive digital signal-proc-

essing hardware.

The CS6403 provides high-quality echo cancel-

lation at low cost. This breakthrough in

cost/performance is made possible on the

CS6403 by custom, application-optimized proc-

essing blocks, which are integrated on a single

die, as shown in Figure 2.

One of these processing blocks is the AFP

(Adaptive Filter Processor). This block imple-

ments a 512-tap AFIR (Adaptive Finite

Impulse-Response) filter which is updated using

an enhanced least-mean squared (LMS) algo-

rithm. At a sampling rate of 8 kHz, it can cancel

up to 64 ms of echo. By default, 10 ms of the

available 64 ms are allocated to a network can-

celler (NEC), and the remaining 54 ms are

allocated to an acoustic echo canceller (AEC).

CONFIG

GPIN0

GPIN1

GPIN2

GPIN3

GPOUT0

GPOUT1

SCLK

SDI

SDO

SFRAME

SMASTER

SSYNC

SYNCOUT

UALAW

NC

CLK_SEL CLKIN CLKOUT SCLK_RATE0 SCLK_RATE1

PLL/Oscillator

RESERVED0

RESERVED1

RESERVED2

RESERVED3

RESERVED4

RESERVED5

RESERVED6

SSI

CPU

AFP

CODEC

RESET

AGND0

AGND1

AVDD

MICIN

SPKROUTP

SPKROUTN

VCM

VREF

DVDD0 DVDD1 DGND0 DGND1 PVDD PGND0 PGND1

Figure 2. CS6403 Internal Block Diagram

DS192PP6

9

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